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115AR / 115BR

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Used as part of a system for precise time and frequency measurements. An external 100KC signal drives a divider circuit which then drives a servo motor for the mechanical time display. The divider is designed so that any disruption of the input stops the output signal and the clock motor, which must be manually restarted. Since the clock display is mechanical, it behaves as “non-volatile memory” across power failures, so that an operator can see exactly when a disruption occurred. Starting the clock requires physical access to the inside of the 115AR chassis, and three manual steps: 1) Operate a toggle switch to the left, to reset the dividers, 2) Operate the same switch to the right to start the dividers, 3) Spin the shaft on the servo motor clockwise (using the convenient knurled knob).

frequency_and_time_standards:hp115ar.jpg frequency_and_time_standards:115ar_2.jpg frequency_and_time_standards:115ar_3.jpg

115ar_115br_frequency_divider_digital_clock.txt · Last modified: 2020/06/26 21:01 by saipan59

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